1. Field
Some example embodiments relate to wiring structures, methods of forming wiring structures and/or methods of manufacturing semiconductor devices. Other example embodiments relate to wiring structures including a plurality of metal layers, methods of forming the same and/or methods of manufacturing semiconductor devices including the same.
2. Description of the Related Art
In a semiconductor device, a wiring structure for interconnection, e.g., a via structure or a contact, may be formed so that signal lines at different levels may be connected to each other. For example, an opening through which a lower conductive pattern is exposed may be formed, and a metal may be deposited in the opening to form the wiring structure.
As a degree of integration of the semiconductor device increases, a width and a pitch of the opening may also decrease. Thus, a deposition property in the opening may be deteriorated.